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149 lines
6.1 KiB
Python
149 lines
6.1 KiB
Python
"""
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Created on 7 May 2013
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@author: mike
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"""
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import math
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import struct
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from volatility.framework import interfaces, exceptions
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class Intel(interfaces.layers.TranslationLayerInterface):
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"""Translation Layer for the Intel IA32 memory mapping"""
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def __init__(self, context, name, memory_layer, page_map_offset):
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interfaces.layers.TranslationLayerInterface.__init__(self, context, name)
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self._base_layer = memory_layer
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self._page_map_offset = page_map_offset
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# All Intel address spaces work on 4096 byte pages
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self._page_size_in_bits = 12
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# These can vary depending on the type of space
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self._entry_format = "<I"
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self._bits_per_register = 32
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self._maxphyaddr = 32
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self._maxvirtaddr = self._maxphyaddr
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self._index_shift = int(math.log(struct.calcsize(self._entry_format), 2))
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self._structure = [('page directory', 10, False),
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('page table', 10, True)]
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@staticmethod
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def _mask(value, high_bit, low_bit):
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"""Returns the bits of a value between highbit and lowbit inclusive"""
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high_mask = (2 ** (high_bit + 1)) - 1
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low_mask = (2 ** low_bit) - 1
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mask = (high_mask ^ low_mask)
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# print(high_bit, low_bit, bin(mask), bin(value))
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return value & mask
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@staticmethod
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def _page_is_valid(entry):
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"""Returns whether a particular page is valid based on its entry"""
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return entry & 1
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def _translate(self, offset):
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"""Translates a specific offset based on paging tables
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Returns the offset and the pagesize
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"""
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# Setup the entry and how far we are through the offset
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# Position maintains the number of bits left to process
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# We or with 0x1 to ensure our page_map_offset is always valid
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entry = self._mask(self._page_map_offset, self._bits_per_register - 1, 0) | 0x1
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position = min(self._maxvirtaddr, self._bits_per_register) - 1
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# Run through the offset in various chunks
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for (name, size, large_page) in self._structure:
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# Check we're valid
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if not self._page_is_valid(entry):
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raise exceptions.InvalidAddressException("Page Fault at entry " + hex(entry) + " in table " + name)
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# Check if we're a large page
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if large_page and (entry & (1 << 7)):
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# We're a large page, the rest is finished below
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# If we want to implement PSE-36, it would need to be done here
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break
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# Figure out how much of the offset we should be using
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start = position
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position -= size
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index = self._mask(offset, start, position + 1) >> (position + 1)
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# Grab the base address of the table we'll be getting the next entry from
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base_address = self._mask(entry, self._maxphyaddr - 1, size + self._index_shift)
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# Create the offset for the next entry
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table_offset = base_address | (index << self._index_shift)
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# Read out the new entry from memory
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entry, = struct.unpack(self._entry_format, self._context.memory.read(self._base_layer, table_offset,
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struct.calcsize(self._entry_format)))
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# Now we're do
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if not self._page_is_valid(entry):
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raise exceptions.InvalidAddressException("Page Fault at entry " + hex(entry) + " in page entry")
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page = self._mask(entry, self._maxphyaddr - 1, position + 1) | self._mask(offset, position, 0)
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return page, 1 << (position + 1)
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def translate(self, offset):
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"""Translates a specific offset based on the paging tables"""
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result, _ = self._translate(offset)
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return result
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def mapping(self, offset, length):
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"""Returns a sorted list of (offset, mapped_offset, length, layer) mappings
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This allows translation layers to provide maps of contiguous regions in one layer
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"""
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result = []
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while length > 0:
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chunk_offset, page_size = self._translate(offset)
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chunk_size = min(page_size - (chunk_offset % page_size), length)
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length -= chunk_size
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offset -= chunk_size
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result.append((chunk_offset, chunk_size))
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return result
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class IntelPAE(Intel):
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"""Class for handling Physical Address Extensions for Intel architectures"""
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def __init__(self, *args, **kwargs):
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Intel.__init__(self, *args, **kwargs)
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# These can vary depending on the type of space
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self._entry_format = "<Q"
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self._bits_per_register = 32
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self._maxphyaddr = 40
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self._maxvirtaddr = self._maxphyaddr
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self._index_shift = int(math.log(struct.calcsize(self._entry_format), 2))
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self._structure = [('page directory pointer', 2, False),
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('page directory', 9, True),
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('page table', 9, True)]
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class Intel32e(Intel):
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def __init__(self, *args, **kwargs):
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Intel.__init__(self, *args, **kwargs)
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# These can vary depending on the type of space
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self._entry_format = "<Q"
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self._bits_per_register = 64
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self._maxphyaddr = 52
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self._maxvirtaddr = 48
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self._index_shift = int(math.log(struct.calcsize(self._entry_format), 2))
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self._structure = [('page map layer 4', 9, False),
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('page directory pointer', 9, True),
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('page directory', 9, True),
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('page table', 9, True)]
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class WindowsMixin(object):
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@staticmethod
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def _page_is_valid(entry):
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"""Returns whether a particular page is valid based on its entry
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Windows uses additional "available" bits to store flags
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These flags allow windows to determine whether a page is still valid
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Bit 11 is the transition flag, and Bit 10 is the prototype flag
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For more information, see Windows Internals (6th Ed, Part 2, pages 268-269)
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"""
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return (entry & 1) or ((entry & 1 << 11) and not (entry & 1 << 10))
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