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https://github.com/volatilityfoundation/volatility3.git
synced 2026-09-30 21:44:52 +02:00
Ensure we don't ever round down when log-ing.
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@@ -32,7 +32,7 @@ class Intel(interfaces.layers.TranslationLayerInterface):
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self._bits_per_register = 32
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self._maxphyaddr = 32
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self._maxvirtaddr = self._maxphyaddr
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self._index_shift = int(round(math.log(struct.calcsize(self._entry_format), 2)))
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self._index_shift = int(math.ceil(math.log2(struct.calcsize(self._entry_format))))
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self._structure = [('page directory', 10, False),
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('page table', 10, True)]
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@@ -196,7 +196,7 @@ class IntelPAE(Intel):
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self._bits_per_register = 32
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self._maxphyaddr = 40
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self._maxvirtaddr = self._maxphyaddr
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self._index_shift = int(round(math.log(struct.calcsize(self._entry_format), 2)))
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self._index_shift = int(math.ceil(math.log2(struct.calcsize(self._entry_format))))
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self._structure = [('page directory pointer', 2, False),
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('page directory', 9, True),
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('page table', 9, True)]
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@@ -216,7 +216,7 @@ class Intel32e(Intel):
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self._bits_per_register = 64
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self._maxphyaddr = 52
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self._maxvirtaddr = 48
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self._index_shift = int(round(math.log(struct.calcsize(self._entry_format), 2)))
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self._index_shift = int(math.ceil(math.log2(struct.calcsize(self._entry_format))))
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self._structure = [('page map layer 4', 9, False),
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('page directory pointer', 9, True),
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('page directory', 9, True),
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