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Ensure we set the correct page_map_offset by masking it to the size of the physical register maximum.
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@@ -31,6 +31,10 @@ class _EPROCESS(objects.Struct):
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# Presumably for 64-bit systems, the DTB is defined as an array, rather than an unsigned long long
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if isinstance(self.Pcb.DirectoryTableBase, objects.Array):
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parent_config['page_map_offset'] = self.Pcb.DirectoryTableBase.cast("unsigned long long")
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else:
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parent_config['page_map_offset'] = self.Pcb.DirectoryTableBase
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parent_config['page_map_offset'] = parent_config['page_map_offset'] & (
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(1 << parent_layer.bits_per_register) - 1)
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# Set the new configuration and construct the layer
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config_path = interfaces.configuration.path_join(config_prefix, preferred_name)
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